ABOUT THE COMPANY:

Tata Electronics Private Limited (TEPL), a wholly owned subsidiary of Tata Sons, is a greenfield initiative focused on building India’s first AI-enabled, state-of-the-art semiconductor foundry. The facility will manufacture advanced semiconductor devices including power management ICs, display driver ICs, MCUs, and high-performance logic—addressing the rising global demand across automotive, computing, wireless communication, data storage, and AI markets.

As part of the Tata Group—a global enterprise operating in 100+ countries across six continents—TEPL is driven by the Tata mission:

“To improve the quality of life of the communities we serve globally, through long-term stakeholder value creation based on leadership with trust.”

The Dholera facility offers a unique opportunity to build India’s semiconductor future.

Position Overview

We are seeking a seasoned ASIC TechFile Development Lead with 10+ years of experience to drive the specification, automation, and validation of ASIC technology files. The ideal candidate will have strong expertise in defining ASIC TechFile specifications using JSON, building TechFiles from scratch, and implementing automation frameworks for standard TechFile generation. This role requires collaboration with Technology Development (TD) and Custom PDK teams, along with advanced scripting skills to streamline and scale ASIC TechFile Development.

Key Responsibilities:

• Work with TD to define and refine ASIC TechFile specifications using JSON.
• Collaborate with Custom PDK team members to align TechFile deliverables with process technology requirements.
• Write, generate, and enhance ASIC TechFiles from scratch across multiple technology nodes.
• Implement automation frameworks to establish a standard TechFile generation mechanism.
• Develop robust scripts in JSON, Ruby, and Python to automate TechFile creation, validation, and updates.
• Drive TechFile development from scratch and validation processes, ensuring accuracy, consistency, and compliance with foundry deliverables.
• Troubleshoot and resolve TechFile-related issues across design flows and EDA tools.
• Document methodologies, automation frameworks, and best practices for internal and external stakeholders.
• Mentor junior engineers and provide technical guidance on TechFile automation and validation.

Required Qualifications

• 10+ years of experience in ASIC design enablement, CAD, or technology file development.
• Proven ability to define TechFile specifications using JSON and build TechFiles from scratch.
• Strong expertise in automation frameworks for TechFile generation.
• Proficiency in Ruby and Python scripting, with hands-on experience in JSON-based automation.
• Deep understanding of semiconductor process technologies and design enablement.
• Excellent problem-solving skills and ability to work in cross-functional teams.
• Strong communication and leadership skills to drive technical initiatives.

 Preferred Qualification:

• Experience working directly with foundries on technology enablement.
• Familiarity with nodes up to 28nm and associated challenges.
• Knowledge of EDA tool internals (Synopsys, Cadence, Mentor).
• Prior experience in leading CAD/flow development teams.