IC Packaging Lead FOL

IC Packaging Lead FOL

Job ID:  30082
Job ID:  30082
Date:  4 Feb 2026
Date:  4 Feb 2026
Location: 

Jagiroad, AS, IN

Location: 

Jagiroad, AS, IN

Department:  Quality & Reliability
Department:  Quality & Reliability
Business:  TSAT India
Business:  TSAT India

IC Packaging Quality Lead (FOL)

 

Location: Jagiroad, Assam


Role Summary

 

The IC Packaging Quality Lead (Front of Line – FOL) is responsible for owning and optimizing IC assembly and packaging processes up to end-of-line (EOL) handoff in a high-volume OSAT environment. This role focuses on driving yield, cost, cycle time, reliability, and stable high-volume manufacturing across advanced IC packaging technologies.


Key Responsibilities

 

  • Own end-to-end FOL process flows for assigned IC packages (QFN/QFP, BGA/FCBGA, WLCSP, SiP/PoP).
  • Define, optimize, and sustain process windows, golden parameters, and control plans across:
    • Wafer-level processes: RDL, UBM, bumping (Cu pillar/SnAg), wafer thinning, passivation, and dicing.
    • Die preparation and attach: die singulation, pick-and-place, epoxy/DAF attach, eutectic or Ag sinter, flip-chip attach.
    • Interconnect processes: wire bonding (Au/Cu/Al), stud bumping, flip-chip reflow, underfill, and edge bonding.
    • Encapsulation and singulation: transfer/compression molding, post-mold cure, saw or laser singulation.
  • Drive cost of manufacturing (COM) improvements through materials optimization, rework reduction, tool life improvement, and setup optimization.
  • Develop package build plans, control plans, and risk assessments (PFMEA) for new products and packages.
  • Lead engineering builds, pilot runs, qualification activities, and ramp-up to high-volume manufacturing with stable yield and CPK.

Essential Attributes

 

  • Strong experience in advanced IC packaging technologies such as Wirebond, Flip-Chip, WLCSP, SiP, Fan-Out, or 2.5D/3D.
  • Hands-on expertise in quality and process methodologies including APQP/PPAP, SPC, MSA, DOE, FMEA, 8D, and JEDEC/AEC reliability standards.
  • Deep understanding of assembly process flows and common failure modes (e.g., delamination, bond lift, die crack, warpage).
  • Customer-facing quality ownership, including issue escalation management and audit leadership.
  • Experience supporting automotive programs and qualifications (IATF 16949, AEC-Q100/104).

Qualifications

 

  • Bachelor’s or Master’s degree in Materials, Mechanical, Electronics, Packaging, or Manufacturing Engineering (or related field).

Experience

 

  • 10–15+ years of experience in semiconductor Assembly & Test quality, with significant exposure to OSAT management and high-volume manufacturing.

IC Packaging Quality Lead (FOL)

 

Location: Jagiroad, Assam


Role Summary

 

The IC Packaging Quality Lead (Front of Line – FOL) is responsible for owning and optimizing IC assembly and packaging processes up to end-of-line (EOL) handoff in a high-volume OSAT environment. This role focuses on driving yield, cost, cycle time, reliability, and stable high-volume manufacturing across advanced IC packaging technologies.


Key Responsibilities

 

  • Own end-to-end FOL process flows for assigned IC packages (QFN/QFP, BGA/FCBGA, WLCSP, SiP/PoP).
  • Define, optimize, and sustain process windows, golden parameters, and control plans across:
    • Wafer-level processes: RDL, UBM, bumping (Cu pillar/SnAg), wafer thinning, passivation, and dicing.
    • Die preparation and attach: die singulation, pick-and-place, epoxy/DAF attach, eutectic or Ag sinter, flip-chip attach.
    • Interconnect processes: wire bonding (Au/Cu/Al), stud bumping, flip-chip reflow, underfill, and edge bonding.
    • Encapsulation and singulation: transfer/compression molding, post-mold cure, saw or laser singulation.
  • Drive cost of manufacturing (COM) improvements through materials optimization, rework reduction, tool life improvement, and setup optimization.
  • Develop package build plans, control plans, and risk assessments (PFMEA) for new products and packages.
  • Lead engineering builds, pilot runs, qualification activities, and ramp-up to high-volume manufacturing with stable yield and CPK.

Essential Attributes

 

  • Strong experience in advanced IC packaging technologies such as Wirebond, Flip-Chip, WLCSP, SiP, Fan-Out, or 2.5D/3D.
  • Hands-on expertise in quality and process methodologies including APQP/PPAP, SPC, MSA, DOE, FMEA, 8D, and JEDEC/AEC reliability standards.
  • Deep understanding of assembly process flows and common failure modes (e.g., delamination, bond lift, die crack, warpage).
  • Customer-facing quality ownership, including issue escalation management and audit leadership.
  • Experience supporting automotive programs and qualifications (IATF 16949, AEC-Q100/104).

Qualifications

 

  • Bachelor’s or Master’s degree in Materials, Mechanical, Electronics, Packaging, or Manufacturing Engineering (or related field).

Experience

 

  • 10–15+ years of experience in semiconductor Assembly & Test quality, with significant exposure to OSAT management and high-volume manufacturing.

Learn More about TATA Electronics

Learn More About Tata Electronics