Test Process Engineer

Test Process Engineer

Job ID:  39158
Job ID:  39158
Date:  4 Apr 2026
Date:  4 Apr 2026
Location: 

Jagiroad, AS, IN

Location: 

Jagiroad, AS, IN

Department:  Test Technology Development
Department:  Test Technology Development
Business:  TSAT India
Business:  TSAT India

Test  Process Engineer in an OSAT (Outsourced Semiconductor Assembly & Test) environment, focused on defining packaging process flows including tray, tube, and tape‑and‑reel.


Role Overview

Lead development, qualification, and continuous improvement of wafer sort (probe) and final test processes and test programs to meet product quality, throughput, and cost targets during NPI and high‑volume manufacturing (HVM).

The Test Process Engineer is responsible for developing, defining, and optimizing end‑of‑line packaging processes for semiconductor devices. This includes wafer Handling , Wafer testing , wafer packing and final test tray packing, tube packing, and tape‑and‑reel processes to ensure compliance with customer requirements, industry standards, and high‑volume manufacturing efficiency.

 

Key Responsibilities

  • Process Flow Definition
    • Develop and document standardized EOL process flows for tray, tube, and tape‑and‑reel packaging.
    • Ensure alignment with customer specifications, JEDEC standards, and OSAT quality requirements.
    • Defining the best materials and Test In and Test out process for all the NPI programs
    • Compliance with customer packaging specifications.
    • Probe card and prober support: Specify probe card requirements, coordinate probe card characterization, and support prober maintenance and qualification
  • Wafer Sort Process Engineer
    • Develop and optimize wafer probe (E‑test) programs on ATE platforms (Teradyne, Advantest, Cohu).
    • Define probe card specifications, coordinate characterization, and manage prober qualification.
    • Execute pilot wafer runs, validate test robustness, and transfer processes to high‑volume manufacturing.
    • Analyze wafer maps and test data; lead root‑cause analysis for yield loss and escapes.
    • Maintain documentation of test flows, release criteria, and change control.
    • Support customer audits and technical reviews related to wafer sort.
  • Packaging Method Development
    • Define packaging methods based on device type, form factor, and customer logistics needs.
    • Specify packaging materials (trays, tubes, reels, cover tapes, carrier tapes) and validate suppliers.
  • Equipment & Automation
    • Support selection, qualification, and optimization of EOL equipment (taping machines, tray loaders, tube packers).
    • Work with automation teams to improve throughput and reduce manual handling.
  • Quality & Compliance
    • Ensure packaging processes meet ESD, moisture sensitivity, and mechanical protection requirements.
    • Support audits and customer reviews with clear documentation and compliance evidence.
    • Data exercise: SPC/trend analysis using sample wafer test data.
  • Continuous Improvement
    • Drive yield and efficiency improvements in EOL processes using Lean/Six Sigma methodologies.
    • Implement corrective actions for packaging defects, mis‑packs, or logistics issues.
    • Data & tools: Maintain test data integrity in MES/Test DB; use statistical tools (JMP/Minitab/Python) for trend analysis and SPC.
  • Cross‑Functional Collaboration
    • Work closely with test engineering, production, and logistics teams to ensure smooth handoff from wafer test , final test to shipping.
    • Act as technical liaison with customers for packaging requirements and change requests.

 

Required Skills & Competencies

  • Education: B.E./B.Tech in Mechanical, Industrial, Electronics, or Manufacturing Engineering.
  • Experience: 4–8 years in semiconductor OSAT  with wafer test and final test process definitions

 

Technical Skills:

    • Knowledge of tray, tube, and tape‑and‑reel packaging standards (JEDEC, IPC).
    • Knowledge of wafer Storage , Handling and Testing and final shipment process
    • Familiar with Wafer Yield analysis and tools and statistical analysis of the wafer data.
    • Familiarity with EOL equipment (taping machines, tray handlers, tube packers).
    • Understanding of ESD control, moisture sensitivity levels (MSL), and device handling.
    • Technology change: advanced nodes and heterogeneous packages increase probe and test complexity; plan for probe card and handler constraints

 

Test  Process Engineer in an OSAT (Outsourced Semiconductor Assembly & Test) environment, focused on defining packaging process flows including tray, tube, and tape‑and‑reel.


Role Overview

Lead development, qualification, and continuous improvement of wafer sort (probe) and final test processes and test programs to meet product quality, throughput, and cost targets during NPI and high‑volume manufacturing (HVM).

The Test Process Engineer is responsible for developing, defining, and optimizing end‑of‑line packaging processes for semiconductor devices. This includes wafer Handling , Wafer testing , wafer packing and final test tray packing, tube packing, and tape‑and‑reel processes to ensure compliance with customer requirements, industry standards, and high‑volume manufacturing efficiency.

 

Key Responsibilities

  • Process Flow Definition
    • Develop and document standardized EOL process flows for tray, tube, and tape‑and‑reel packaging.
    • Ensure alignment with customer specifications, JEDEC standards, and OSAT quality requirements.
    • Defining the best materials and Test In and Test out process for all the NPI programs
    • Compliance with customer packaging specifications.
    • Probe card and prober support: Specify probe card requirements, coordinate probe card characterization, and support prober maintenance and qualification
  • Wafer Sort Process Engineer
    • Develop and optimize wafer probe (E‑test) programs on ATE platforms (Teradyne, Advantest, Cohu).
    • Define probe card specifications, coordinate characterization, and manage prober qualification.
    • Execute pilot wafer runs, validate test robustness, and transfer processes to high‑volume manufacturing.
    • Analyze wafer maps and test data; lead root‑cause analysis for yield loss and escapes.
    • Maintain documentation of test flows, release criteria, and change control.
    • Support customer audits and technical reviews related to wafer sort.
  • Packaging Method Development
    • Define packaging methods based on device type, form factor, and customer logistics needs.
    • Specify packaging materials (trays, tubes, reels, cover tapes, carrier tapes) and validate suppliers.
  • Equipment & Automation
    • Support selection, qualification, and optimization of EOL equipment (taping machines, tray loaders, tube packers).
    • Work with automation teams to improve throughput and reduce manual handling.
  • Quality & Compliance
    • Ensure packaging processes meet ESD, moisture sensitivity, and mechanical protection requirements.
    • Support audits and customer reviews with clear documentation and compliance evidence.
    • Data exercise: SPC/trend analysis using sample wafer test data.
  • Continuous Improvement
    • Drive yield and efficiency improvements in EOL processes using Lean/Six Sigma methodologies.
    • Implement corrective actions for packaging defects, mis‑packs, or logistics issues.
    • Data & tools: Maintain test data integrity in MES/Test DB; use statistical tools (JMP/Minitab/Python) for trend analysis and SPC.
  • Cross‑Functional Collaboration
    • Work closely with test engineering, production, and logistics teams to ensure smooth handoff from wafer test , final test to shipping.
    • Act as technical liaison with customers for packaging requirements and change requests.

 

Required Skills & Competencies

  • Education: B.E./B.Tech in Mechanical, Industrial, Electronics, or Manufacturing Engineering.
  • Experience: 4–8 years in semiconductor OSAT  with wafer test and final test process definitions

 

Technical Skills:

    • Knowledge of tray, tube, and tape‑and‑reel packaging standards (JEDEC, IPC).
    • Knowledge of wafer Storage , Handling and Testing and final shipment process
    • Familiar with Wafer Yield analysis and tools and statistical analysis of the wafer data.
    • Familiarity with EOL equipment (taping machines, tray handlers, tube packers).
    • Understanding of ESD control, moisture sensitivity levels (MSL), and device handling.
    • Technology change: advanced nodes and heterogeneous packages increase probe and test complexity; plan for probe card and handler constraints

 

Learn More about TATA Electronics

Learn More About Tata Electronics